Dent Lattice — 7-Node Hardware Demonstrator

0. Goal

Build seven physical nodes. Connect them. Kill one. Watch the survivors reroute, redistribute load, and adapt their coupling phase. That is the entire goal of this build. No origami. No metabolism. No cognition. One primitive: distributed adaptive coupling under physical stress. If the seven nodes pass, the substrate is materially credible. If they fail, §11 of the preprint tells us where the redesign starts.

1. Layout — controlled asymmetry

A symmetric 6-around-1 hex would hide the dynamics we need to see. The first build is deliberately asymmetric:

One centre node (N0). Six surrounding nodes (N1–N6). All six edges from N0 to N1–N5 are full strength. The edge N0–N4 is intentionally weak — half the coil turns, twice the resistance. When load is applied between N4 and N0, the substrate must reroute around the weak edge. This single asymmetry produces visible decision-making during stress.

Each node is a 30 mm × 30 mm 2-layer PCB. Edges are not soldered — they are pluggable jumper coils mounted on header pins. Edges can be physically removed mid-experiment to simulate edge failure independently from node failure.

2. Per-node design — observability first

2.1 Required components

2.2 What you must NOT optimise away

3. PCB notes for JLCPCB

• Order qty 10 boards (need 7 + spares)
• 2-layer FR-4, 1.6 mm thickness, ENIG finish (better solder joints for the through-hole supercap)
• Black soldermask (LEDs read better against black)
• White silkscreen with all test point labels printed in ≥10 pt — they need to be readable in video
• JLCPCB Q100 (component matching) for the SMT parts; hand-solder the headers, supercap, coils
• Test points = 1.5 mm Mill-Max sockets, NOT pads. Probes need somewhere mechanical to grip.

4. Coil construction — six per node

Each edge between two nodes is one coil. Two header pins on each PCB hold the coil. Coils are removable.

Wind each by hand on a small lathe-or-jig. Mark them with coloured heat-shrink: red = STANDARD, white = WEAK, blue = OUTER. So during the experiment a researcher can see at a glance which edge is weak.

5. Firmware skeleton

The Python decision rule from the preprint §3.1 ports verbatim to ESP-IDF C. Each node runs the same firmware; nodes differ only in their assigned ID (set by 4 DIP switches reading the lower nibble at boot).

// dent_node.c — minimal ESP-IDF firmware skeleton

#include <esp_now.h>
#include <esp_wifi.h>

#define HEARTBEAT_PERIOD_MS 16
#define HEARTBEAT_TIMEOUT_MS 150
#define MAX_NEIGHBOURS 6

typedef struct {
    uint8_t id;
    uint8_t phase;          // 0..5
    float energy_J;
    float load_N;
    float damage;
    bool alive;
    uint64_t last_heartbeat[MAX_NEIGHBOURS];
    uint8_t neighbour_ids[MAX_NEIGHBOURS];
    uint8_t routes[256];    // dest -> next-hop id, 0xFF = unknown
} node_state_t;

static node_state_t self;

void on_hb_recv(const uint8_t *mac, const uint8_t *data, int len) {
    uint8_t nb_id = data[0];
    self.last_heartbeat[find_neighbour_idx(nb_id)] = esp_timer_get_time() / 1000;
    // import routes from this neighbour
    for (int i = 1; i + 1 < len; i += 2) {
        uint8_t dest = data[i];
        if (dest != self.id && self.routes[dest] == 0xFF) {
            self.routes[dest] = nb_id;
        }
    }
}

uint8_t decide_phase(node_state_t *n) {
    if (n->energy_J < 0.9f)              return 0;   // browned out (5% E_max)
    if (n->damage > 0.5f)                return 1;   // injured
    if (n->load_N > 8.0f)                return 5;   // fused
    if (n->load_N > 4.0f)                return 4;
    if (n->load_N > 1.5f)                return 3;
    if (n->load_N > 0.2f)                return 2;
    return 1;                                            // baseline sense
}

void heartbeat_task(void *_) {
    while (1) {
        uint8_t pkt[64] = {self.id};
        int n = 1;
        for (int d = 0; d < 256; d++) {
            if (self.routes[d] != 0xFF) { pkt[n++] = d; pkt[n++] = self.routes[d]; }
        }
        esp_now_send(BROADCAST_MAC, pkt, n);
        gpio_set_level(LED_HB, 1); vTaskDelay(2 / portTICK_PERIOD_MS); gpio_set_level(LED_HB, 0);
        vTaskDelay(HEARTBEAT_PERIOD_MS / portTICK_PERIOD_MS);
    }
}

void detect_dead_neighbours(void) {
    uint64_t now_ms = esp_timer_get_time() / 1000;
    for (int i = 0; i < MAX_NEIGHBOURS; i++) {
        if (self.last_heartbeat[i] && (now_ms - self.last_heartbeat[i]) > HEARTBEAT_TIMEOUT_MS) {
            uint8_t dead_id = self.neighbour_ids[i];
            for (int d = 0; d < 256; d++) {
                if (self.routes[d] == dead_id) self.routes[d] = 0xFF;
            }
            self.last_heartbeat[i] = 0;
            ESP_LOGI("dent", "neighbour %u declared dead, routes purged", dead_id);
        }
    }
}

void apply_phase(uint8_t phase, gpio_num_t ina, gpio_num_t inb) {
    int duty = phase * 51;   // 0..255 PWM duty per phase
    ledc_set_duty(LEDC_LOW_SPEED_MODE, ina, duty);
    ledc_update_duty(LEDC_LOW_SPEED_MODE, ina);
}

Each node runs three FreeRTOS tasks: heartbeat (16 ms), control (62 Hz — phase decision and apply), and telemetry (10 Hz UART log).

6. Test procedures (M1 measurements)

Each procedure produces a numbered data file. Don't run a procedure without writing one. Each file gets pushed to git after the run; failed runs go in the same git history with the failure mode noted.

6.1 P1 — Reroute latency on node death

1. Power up all 7 nodes from external bench supply (skip supercap during this test).
2. Attach UART to a hub; log all nodes simultaneously.
3. At t = 5 s, physically pull the supercap header on N3.
4. Record from each surviving UART log: time of last heartbeat received from N3, time when N3 marked dead, time when all routes through N3 were purged.
5. Repeat 50× across all interior nodes.
6. Plot histogram of (route_purge_time − N3_power_off_time). Expected mean: 50–80 ms.

6.2 P2 — Stiffness modulation under load

1. Mount node panel vertically, clamp N1–N6 to a force gauge (Imada DS2-200N).
2. Apply increasing load to N4 (the weak edge): 0.5 N → 1 N → 2 N → 4 N → 8 N → 12 N.
3. For each load step, record from each node's UART log: phase, supercap V, coil current at shunt.
4. Plot phase vs applied load on N4 (expected: matches §3.1 of preprint to within ±0.5 N at each threshold).
5. Plot apparent stiffness (force / displacement) vs phase. Expected: monotonically increasing.

6.3 P3 — Supercap recharge cycle (no shard delivery yet)

1. Disconnect bench supply. Run on supercap only.
2. Apply 4 N continuously to N4. Allow nodes to brown out.
3. Inject a 12 V pulse for 50 ms onto J_PWR of one node at a time, mimicking a shard delivery.
4. Record UART log: time from injection to that node returning to phase 1 sensing.
5. Plot recovery latency. Expected: under 200 ms per node.

6.4 P4 — Asymmetry visibility

1. Apply 4 N at N4 (along the WEAK edge to N0).
2. Capture: phase distribution across all 7 nodes.
3. Expected behaviour: the substrate routes load THROUGH the strong edges (e.g. via N3 or N5) instead of through the weak N0–N4 edge. N3 and N5 should be observed in higher phase than N0 itself.
4. This is the visual proof that local rules produce non-trivial structural decisions.

7. Failure analysis (what to look for)

From the preprint §7, we expect to see one or more of these problems on first power-up. Predicting them in advance prevents panic.

8. Total cost (single 7-node build)

9. Time budget

10. Definition of M1 done

M1 is complete and publishable when all four conditions hold:

1. P1 mean reroute latency under 100 ms with σ < 30 ms across 50 trials
2. P2 phase thresholds match preprint §3.1 within ±0.5 N at every transition, across all 7 nodes
3. P3 supercap recovery returns nodes to phase 1 in under 250 ms after pulse injection
4. P4 video shows visible re-routing of load away from the weak edge with no firmware adjustment between runs

If any single condition fails, write the failure mode into a follow-up commit and iterate. Do not proceed to M2 until all four pass.

11. What this build is NOT trying to prove

• Not consciousness
• Not metabolism
• Not cognition
• Not biological equivalence
• Not emergence
• Not full body morphology

This build proves one mechanism: distributed adaptive coupling with self-repair, under physical load, on commodity hardware. That is enough for M1. Higher-order claims wait for higher-numbered milestones.

v1 build doc · 9 May 2026 · ShortFactory Research · sister documents: preprint · live simulator